VLSI Test and Hardware Security Background for Hardware Obfuscation

Hardware obfuscation is a technique to conceal the design frommalicious insider and outsider adversaries. Obfuscation techniques transform the original design such that the obfuscated version is functionally equivalent to the original design, but it does not reveal the design details and is much harder to reverse-engineer [1]. As discussed earlier in Chap.1, the business model of distributed and outsourced design, integration, manufacturing, packaging, and distribution channels creates challenges such as intellectual property (IP) piracy, reverse engineering of the netlist from GDSII, integrated circuit (IC) cloning, and counterfeiting opportunities. Nanometer-sized integrated circuit feature sizes and increased gate density per wafer have been made possible with the advancements in photolithography techniques. However, this has driven the cost and maintenance of fabrication facilities into the billions of dollars, making the business model difficult to justify and sustain. Consequently, many major companies have become fabless and instead outsource their designs to offshore foundries as a cost-effective alternative to owning andoperating their own fabs. Unfortunately, the horizontal dissemination of the design process to companies all over the world decreases the trustworthiness and increases the security risks of the design process [2, 3]. This chapter overviews the traditional design flow of integrated circuits and assesses processes in termsof howmuch information is revealed to aid in reverse engineering the design. We survey the proposed schemes that are designed to enhance the security properties of traditional verification and testing mechanisms to make designs resilient to attacks. This chapter also investigates IP protection schemes that